Worcester Polytechnic Institute & University of Massachusetts Amherst
Worcester Polytechnic Institute and the University of Massachusetts Amherst jointly received funding through the SFF 2024 FlexHEGs (Flexible Hardware-Enabled Guarantees) grant round for hardware security research relevant to AI governance. The collaboration brings together expertise in side-channel analysis, physically unclonable functions, chiplet security, and supply chain verification for integrated circuits. Their work investigates how physical-layer security mechanisms in semiconductor hardware can be used to verify compliance with agreements governing AI development and deployment, contributing to the technical feasibility of international AI governance frameworks.
Funding Details
- Annual Budget
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- Monthly Burn Rate
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- Current Runway
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- Funding Goal
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- Funding Raised to Date
- $233,000
- Fiscal Sponsor
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Theory of Change
By developing and validating hardware-level security mechanisms for semiconductor chips, this research contributes to the technical feasibility of international AI governance agreements. If AI computing hardware can be physically verified for compliance at the chip level -- detecting tampering, authenticating manufacturing provenance, and monitoring computation without revealing proprietary information -- this creates a trustworthy physical foundation for multilateral agreements to regulate dangerous AI development. The FlexHEGs concept envisions reprogrammable secure processors embedded in AI chips that can enforce flexible rules set through multilateral decision-making, blocking non-compliant computations while preserving privacy. Hardware security expertise in side-channel analysis, PUFs, and chiplet verification directly supports the development of these tamper-proof governance mechanisms.
Grants Received
from Survival and Flourishing Fund
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Details
- Last Updated
- Mar 19, 2026, 10:11 PM UTC
- Created
- Mar 18, 2026, 11:18 PM UTC