Worcester Polytechnic Institute & University of Massachusetts Amherst
A collaborative hardware security research effort between WPI and UMass Amherst focused on developing tamper-detection and verification mechanisms for semiconductor chips, with applications to AI governance and hardware-enabled guarantees.
A collaborative hardware security research effort between WPI and UMass Amherst focused on developing tamper-detection and verification mechanisms for semiconductor chips, with applications to AI governance and hardware-enabled guarantees.
People– no linked people
Updated 03/19/26Funding Details
Updated 03/19/26- Annual Budget
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- Current Runway
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- Funding Goal
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- Funding Raised to Date
- $233,000
Org Details
Updated 03/19/26This entry represents a collaborative research project between Worcester Polytechnic Institute (WPI) in Worcester, Massachusetts and the University of Massachusetts Amherst, funded through the Survival and Flourishing Fund's 2024 Flexible Hardware-Enabled Guarantees (FlexHEGs) grant round. The project received $233,000 in total funding, with WPI receiving two-thirds and UMass Amherst receiving one-third. The collaboration builds on existing research partnerships between hardware security faculty at both institutions. At WPI, the Electrical and Computer Engineering department houses advanced hardware security research capabilities, including NSF-funded infrared microscopes used for side-channel analysis, physically unclonable functions (PUFs), and tamper detection in semiconductor devices. Researchers at WPI have published on chiplet security vulnerabilities, demonstrating how emerging modular chip architectures can be susceptible to eavesdropping through contactless probing techniques. At UMass Amherst, the Electrical and Computer Engineering department contributes expertise in secure embedded systems design, supply chain security for integrated circuits, and formal verification of hardware. Researchers from both institutions have co-authored work on evaluating the vulnerability of chiplet-based systems to contactless probing techniques, published at the International Test Conference. The FlexHEGs program funds research into hardware mechanisms that could enable multilateral, privacy-preserving, and trustworthy verification of compliance with agreements regarding the development and use of advanced AI technology. The WPI-UMass collaboration contributes to this agenda by investigating physical-layer security mechanisms that could form the foundation of hardware-enabled AI governance systems.
Theory of Change
Updated 03/19/26By developing and validating hardware-level security mechanisms for semiconductor chips, this research contributes to the technical feasibility of international AI governance agreements. If AI computing hardware can be physically verified for compliance at the chip level -- detecting tampering, authenticating manufacturing provenance, and monitoring computation without revealing proprietary information -- this creates a trustworthy physical foundation for multilateral agreements to regulate dangerous AI development. The FlexHEGs concept envisions reprogrammable secure processors embedded in AI chips that can enforce flexible rules set through multilateral decision-making, blocking non-compliant computations while preserving privacy. Hardware security expertise in side-channel analysis, PUFs, and chiplet verification directly supports the development of these tamper-proof governance mechanisms.
Grants Received
Updated 03/19/26Projects– no linked projects
Updated 03/19/26Discussion
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